The invention relates to a clock circuit for a system for the reading of sequential information elements. It can be applied, for example, to the reading of information elements recorded on magnetic tape, magnetic disks or optical disks, notably in computer peripherals.
In a digital recorder, the decoding of the binary information elements is done by the regeneration of the temporal reference signal (clock signal) used for the recording of the information elements. This clock signal is usually given by a voltage controlled oscillator inserted in a phase-locked loop which is synchronized with the transitions of the reading signal.
In a multitrack recorder, it is possible to use a single clock circuit reconstructed for all the tracks, provided that the synchronization among all the tracks recorded on the tape is preserved. This entails the assumption that the recording heads and the reading heads are aligned and that the tape does not become deformed. If these conditions are not strictly met, the temporal references of the various tracks become offset with respect to each other, undergoing "skew". It is possible to compensate for skew defects if they are not too great.
In the other cases, and especially in recorders which achieve a high density of information in the longitudinal direction of the reading of the recording media, and which have a large number of parallel tracks, it is impossible to keep the skew small enough to be able to compensate for it on all the tracks. It is then necessary to make an independent clock regeneration circuit for each track, and this leads to having a great number of circuits.
The invention is aimed at reducing this great number of clock circuits. According to the invention, the digital structure of the clock regeneration circuit makes it possible, with only one set of operators, to carry out the necessary operations sequentially on a large number of tracks, leading to a major simplification of the electronics. The invention takes advantage of the correlations that exist among the clock signals of each of the tracks.
This sequential circuit according to the invention enables substantial improvement in the performance characteristics of the entire system.